antime
Extra Hard Mid Boss
Here's the first draft schematic for a flash cart with a built-in USB port. It's got 256K of flash and an FT245R USB FIFO. One thing I'm a bit wary of is that the FIFO status lines are connected directly to the bus buffer. Would it be better if they were latched somehow, or routed via a Schmitt trigger buffer or something? The design also assumes ideal circuits with no switching delays etc.
Unfortunately the design requires a modchip to bootstrap the flash memory, but there is a jumper for reflashing the cart in case you write a bad firmware to it. Comments welcome, the bus control line logic probably has some errors in it.
EDIT:
Quick link to the cartridge page: http://www.iki.fi/~antime/sega/usbcart/usbcart.html
Quick link to the project files on github: https://github.com/andersm/usbcart
Unfortunately the design requires a modchip to bootstrap the flash memory, but there is a jumper for reflashing the cart in case you write a bad firmware to it. Comments welcome, the bus control line logic probably has some errors in it.
EDIT:
Quick link to the cartridge page: http://www.iki.fi/~antime/sega/usbcart/usbcart.html
Quick link to the project files on github: https://github.com/andersm/usbcart